1. Field of the Invention
The present invention relates to a high frequency delay circuit which delays a high frequency signal to a desired phase. More particularly, the present invention relates to a high frequency delay circuit used for a test apparatus operable to test an electronic device.
2. Description of the Related Art
Conventionally, a test apparatus for testing an electronic device includes a pattern generator which generates a test pattern used for a test of the electronic device, a waveform shaper which forms the test pattern, and timing generator which generates timing at which the test pattern formed by the waveform shaper is to be output. For example, timing generator generates a clock having a predetermined frequency and a predetermined phase based on the reference clock, and the waveform shaper forms the test pattern according to the clock generated by the timing generator and outputs it.
At this time, timing generator needs to generate the clock having the same frequency as the frequency of the test pattern which is to be supplied to the electronic device. On the other hand, with improvement in the speed of the electronic device of these days, it is necessary to use the high frequency for the test pattern to be supplied. Therefore, also in the timing generator, it is necessary to control the higher frequency clock to a desired phase and to output it.
Conventionally, there are some devices which generate the clock having desired frequency by PLL (Phase Lock Loop) as a timing generator, delay the generated high frequency clock to the desired phase, and output it.
As mentioned above, the conventional timing generator generates the high frequency clock and delays the generated high frequency clock by a delay circuit. However, it is difficult to delay a high frequency clock. For example, in case that the clock is to be delayed using rounding of the edges of the clock, it is difficult to sufficiently delay each edge when the rise time of the clock or the like becomes short. Therefore, it is more difficult to delay the high frequency signal compared with a low frequency clock.